Arm Processor Exception Handling - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2021-06-16
Version
2021.1 English

Arm processors specific exception related APIs for Arm Cortex-A53, Cortex-A9, and Cortex-R5F can utilized for enabling/disabling IRQ, registering/removing handler for exceptions or initializing exception vector table with null handler.

Table 1. Quick Function Reference
Type Name Arguments
void Xil_ExceptionRegisterHandler
  • u32 Exception_id
  • Xil_ExceptionHandler Handler
  • void * Data
void Xil_ExceptionRemoveHandler
  • u32 Exception_id
void Xil_GetExceptionRegisterHandler
  • u32 Exception_id
  • Xil_ExceptionHandler * Handler
  • void ** Data
void Xil_ExceptionInit
  • void
void Xil_DataAbortHandler
  • void
void Xil_PrefetchAbortHandler
  • void
void Xil_UndefinedExceptionHandler
  • void