#Define Xil_DCacheFlushRange - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2021-06-16
Version
2021.1 English

Description

Flush the Data cache for the given address range.

If the bytes specified by the address (adr) are cached by the Data cache, the cacheline containing that byte is invalidated. If the cacheline is modified (dirty), the written to system memory first before the before the line is invalidated.

Parameters

The following table lists the Xil_DCacheFlushRange function arguments.

Table 1. Xil_DCacheFlushRange Arguments
Name Description
Addr Start address of range to be flushed.
Len Length of range to be flushed in bytes.