MIO Pins for Zynq PL eFUSE JTAG Operations - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2021-06-16
Version
2021.1 English

The table below lists the MIO pins for Zynq PL eFUSE JTAG operations. You can change the listed pins at your discretion.

Note: The pin numbers listed in the table below are examples. You must assign appropriate pin numbers as per your hardware design.
Pin Name Pin Number
XSK_EFUSEPL_MIO_JTAG_TDI (17)
XSK_EFUSEPL_MIO_JTAG_TDO (21)
XSK_EFUSEPL_MIO_JTAG_TCK (19)
XSK_EFUSEPL_MIO_JTAG_TMS (20)