Xil_L2CacheInvalidateRange - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2021-06-16
Version
2021.1 English

Invalidate the level 2 cache for the given address range.

If the bytes specified by the address range are cached by the L2 cache, the cacheline containing those bytes are invalidated. If the cachelines are modified (dirty), the modified contents are lost and are NOT written to system memory before the lines are invalidated.

Prototype

void Xil_L2CacheInvalidateRange(u32 adr, u32 len);

Parameters

The following table lists the Xil_L2CacheInvalidateRange function arguments.

Table 1. Xil_L2CacheInvalidateRange Arguments
Name Description
adr 32bit start address of the range to be invalidated.
len Length of the range to be invalidated in bytes.

Returns

None.