Zynq UltraScale+ MPSoC eFUSE PS API - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2021-06-16
Version
2021.1 English

This chapter provides a linked summary and detailed descriptions of the Zynq MPSoC UltraScale+ eFUSE PS APIs.

Example Usage

This file contains the PS eFUSE API's of Zynq UltraScale+ MPSoC to program/read the eFUSE array.
Table 1. Quick Function Reference
Type Name Arguments
u32 XilSKey_ZynqMp_EfusePs_CheckAesKeyCrc
  • u32 CrcValue
u32 XilSKey_ZynqMp_EfusePs_ReadUserFuse
  • u32 * UseFusePtr
  • u8 UserFuse_Num
  • u8 ReadOption
u32 XilSKey_ZynqMp_EfusePs_ReadPpk0Hash
  • u32 * Ppk0Hash
  • u8 ReadOption
u32 XilSKey_ZynqMp_EfusePs_ReadPpk1Hash
  • u32 * Ppk1Hash
  • u8 ReadOption
u32 XilSKey_ZynqMp_EfusePs_ReadSpkId
  • u32 * SpkId
  • u8 ReadOption
void XilSKey_ZynqMp_EfusePs_ReadDna
  • u32 * DnaRead
u32 XilSKey_ZynqMp_EfusePs_ReadSecCtrlBits
  • XilSKey_SecCtrlBits * ReadBackSecCtrlBits
  • u8 ReadOption
u32 XilSKey_ZynqMp_EfusePs_CacheLoad
  • void
u32 XilSKey_ZynqMp_EfusePs_Write
  • XilSKey_ZynqMpEPs * InstancePtr
u32 XilSkey_ZynqMpEfuseAccess
  • const u32 AddrHigh
  • const u32 AddrLow
void XilSKey_ZynqMp_EfusePs_SetTimerValues
  • void
u32 XilSKey_ZynqMp_EfusePs_ReadRow
  • u8 Row
  • XskEfusePs_Type EfuseType
  • u32 * RowData
u32 XilSKey_ZynqMp_EfusePs_SetWriteConditions
  • void
u32 XilSKey_ZynqMp_EfusePs_WriteAndVerifyBit
  • u8 Row
  • u8 Column
  • XskEfusePs_Type EfuseType
u32 XilSKey_ZynqMp_EfusePs_Init
  • void
u32 XilSKey_ZynqMp_EfusePs_CheckForZeros
  • u8 RowStart
  • u8 RowEnd
  • XskEfusePs_Type EfuseType
u32 XilSKey_ZynqMp_EfusePs_WritePufHelprData
  • const XilSKey_Puf * InstancePtr
u32 XilSKey_ZynqMp_EfusePs_ReadPufHelprData
  • u32 * Address
u32 XilSKey_ZynqMp_EfusePs_WritePufChash
  • const XilSKey_Puf * InstancePtr
u32 XilSKey_ZynqMp_EfusePs_ReadPufChash
  • u32 * Address
  • u8 ReadOption
u32 XilSKey_ZynqMp_EfusePs_WritePufAux
  • const XilSKey_Puf * InstancePtr
u32 XilSKey_ZynqMp_EfusePs_ReadPufAux
  • u32 * Address
  • u8 ReadOption
u32 XilSKey_Write_Puf_EfusePs_SecureBits
  • const XilSKey_Puf_Secure * WriteSecureBits
u32 XilSKey_Read_Puf_EfusePs_SecureBits
  • XilSKey_Puf_Secure * SecureBitsRead
  • u8 ReadOption
u32 XilSKey_Puf_Registration
  • XilSKey_Puf * InstancePtr
u32 XilSKey_Puf_Regeneration
  • const XilSKey_Puf * InstancePtr
INLINE u32 XilSKey_ZynqMp_EfusePsWrite_Checks
  • XilSKey_ZynqMpEPs * InstancePtr
INLINE u32 XilSKey_ZynqMp_EfusePs_WriteAndVerify_RowRange
  • const u8 * Data
  • u8 RowStart
  • u8 RowEnd
  • XskEfusePs_Type EfuseType
INLINE u32 XilSKey_ZynqMp_EfusePs_WriteBit
  • u8 Row
  • u8 Column
  • XskEfusePs_Type EfuseType
INLINE u32 XilSKey_ZynqMp_EfusePs_Write_SecCtrl
  • const XilSKey_ZynqMpEPs * InstancePtr
INLINE u32 XilSKey_ZynqMp_EfusePs_Write_SecCtrlBits
  • const XilSKey_ZynqMpEPs * InstancePtr
INLINE u32 XilSKey_ZynqMp_EfusePs_Write_UsrCtrlBits
  • const XilSKey_ZynqMpEPs * InstancePtr
INLINE void XilSKey_ZynqMp_EfusePs_ReadSecCtrlBits_Regs
  • XilSKey_SecCtrlBits * ReadBackSecCtrlBits
INLINE u32 XilSKey_ZynqMp_EfusePs_CheckZeros_BfrPrgrmg
  • const XilSKey_ZynqMpEPs * InstancePtr
INLINE u32 XilSKey_ZynqMp_EfusePs_UserFuses_WriteChecks
  • const XilSKey_ZynqMpEPs * InstancePtr
  • UserFuses_TobePrgrmd
INLINE u32 XilSKey_ZynqMp_EfusePs_UserFuses_TobeProgrammed
  • const u8 * UserFuses_Write
  • const u8 * UserFuses_Read
  • XilSKey_UsrFuses * UserFuses_ToBePrgrmd
INLINE u32 XilSKey_ZynqMp_EfusePs_Enable_Rsa
  • const u8 * SecBits_read
u32 XilSKey_ZynqMpEfuseRead
  • Offset
  • Buffer
  • Size
  • UsrFuseNum
  • const u32 AddrHigh
  • const u32 AddrLow
u32 XilSKey_ZynqMpEfuseWrite
  • const u32 AddrHigh
  • const u32 AddrLow