I/O - 2021.1 English

Versal ACAP Design Guide (UG1273)

Document ID
UG1273
Release Date
2021-06-30
Version
2021.1 English

The IDDR/ODDR and IBUF/OBUF primitives are automatically migrated. Xilinx provides the Advanced I/O Wizard and Advanced I/O Planner to build high-speed I/O interfaces for Versal devices, similar to interfaces created using SelectIO native mode for UltraScale devices.