Persistent Global General Storage Registers - 2021.1 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2021-06-16
Version
2021.1 English

Four 32-bit persistent global storage registers are available for general use. Their values are preserved after software reboot. See Global Storage Registers for more information.

The following registers are reserved.

Recommended: Xilinx recommends that you do not use reserved registers.
Table 1. Reserved Storage Registers
Register Description
PMC_GLOBAL_GLOBAL_GEN_STORAGE0, PMC_GLOBAL_GLOBAL_GEN_STORAGE1 Contains the ROM execution time stamp. When PLM is active, it reads these two registers to obtain the execution time of ROM. Registers can be used after loading boot PDI.
PMC_GLOBAL_GLOBAL_GEN_STORAGE2 Contains device security status, updated by ROM. PLM uses this register to determine if KAT needs to be performed.
PMC_GLOBAL_GLOBAL_GEN_STORAGE4 Used by PLM to store ATF handoff parameter address pointer.
PMC_GLOBAL_PERS_GLOB_GEN_STORAGE0 Reserved for XilPM to save the status of each power domain initialization.
PMC_GLOBAL_PERS_GLOB_GEN_STORAGE1 Not yet used in PLM but intended for data sharing between PLM and debugger.