Versal™ ACAP devices include five types of programmable processors. Each type of processor provides different computation capabilities to meet different requirements of the overall system:
- Arm® Cortex®-A72 dual-core processor in the processor system (PS)
- Typically used for control-plane applications, operating systems, communications interfaces, and lower level or complex computations.
- Arm Cortex-R5F dual-core processor in the PS
- Typically used for applications requiring safety and determinism.
- MicroBlaze™ processors in the programmable logic (PL)
- (Optional) Typically used for data manipulation and transport, non-vector-based computation, and interfacing to the PS and other components on Versal ACAP.
- ROM control unit (RCU) and PMC processing unit (PPU) units in the PMC
- Typically used for executing the PLM code.
- AI Engines
- Typically used for compute-intensive functions in vector implementations.
Another key block in Versal ACAP is the PMC. Typically used for executing PLM code. This block is responsible for boot, configuration, partial-reconfiguration, and life cycle management tasks such as security. For more information about PMC management of boot and partial reconfiguration, see Boot and Configuration.
This chapter briefly discusses:
- PS with dual-core Cortex-A72 and dual-core Cortex-R5F processors
- MicroBlaze processor in the PL
- Linux and bare-metal software stacks used with the processors
- Boot and configuration information
- Additional features relevant to a software engineer
For details about additional features such as the PMC, DDR bus width, number of DDR memory controllers, interconnect for CCIX and PCIe (CPM), and PCI Express® , see the Versal Architecture and Product Data Sheet: Overview (DS950). The Versal ACAP Technical Reference Manual (AM011) includes details on PMC/PS-centric content with a hardware architecture section that includes links to documents that describe other integrated hardware and peripherals including the CPM, DDR, AI Engine, PL, and more.