Applying Common Timing Closure Techniques - 2021.1 English

Versal ACAP System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2021-07-26
Version
2021.1 English

The following techniques can help with design closure on challenging designs. Before attempting these techniques, ensure that the design is properly constrained and that you identify the main issue that affects the top violating paths.

Recommended: Xilinx recommends running the report_qor_suggestions Tcl command to identify and apply many of these techniques automatically.