Changed Behavior - 2021.1 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
Release Date
2022-03-29
Version
2021.1 English

The following table specifies differences between this release and prior releases that impact behavior or flow when migrating.

Table 1. Changed Behavior Summary
Area Behavior
Vitis HLS 1 The Git Repository used to be accessible from the left hand lower quadrant. It has moved to the Console area.
The Analysis perspective no longer exists. The reports and views are now accessible from the Synthesis layout.
Pragma HLS SHARED was previously a standalone pragma. It is now specified in the pragma HLS STREAM type= option.
  • pragma HLS SHARED is now pragma HLS STREAM type=shared.
  • pragma HLS SHARED and pragma HLS STABLE now combine to pragma HLS STREAM type=unsync (shared and unsynchronized).
The default setting of config_interface -m_axi_offset for the Vivado IP flow has changed to slave. This means that when an m_axi interface is added to a Vivado IP an s_axilite interface is also added and the offset is managed through it.
Floating point accumulators and MAC offer new precision for greater control through the config_op command. To replicate 2020.2 results in 2021.1, use the following command:
config_op facc -impl auto -precision low
Vitis profile In the xrt.ini file, profile=true has been changed to opencl_summary=true and opencl_device_counter=true to capture kernel-side data. These options can be specified separately or together.
Vitis timeline All trace results (opencl_trace=true, data_transfer_trace=true, stall_trace=all, and others) are added to the are added to the Application Timeline in Vitis analyzer. You can specify which elements are added to the Application Timeline when viewing the report.
timeline_trace is changed to opencl_trace.
Vitis debug GDB kernel debug during hardware emulation is no longer supported.
Vitis AI Engine The default optimization level has changed from xlopt=0 in 2020.2 to xlopt=1 in 2021.1.
Using the -aie-sim-options of launch_hw_emu.sh, you can profile AI Engines with AIE_PROFILE enabled through a text file.
Changes to x86simulator: packet switching construct support, GDB debugging, and printf() macros have been added.
XRT native C++ API for controlling the graph (xrt::graph) has been added.
Hardware Emulation support is now provided for designs accessing GMIO.
Support for PL kernels in the ADF graph is deprecated.
  1. See the Vitis High-Level Synthesis User Guide (UG1399) for more details.