There are separate project files and sources for each of the labs in this tutorial. Download the reference design files for this tutorial from the Xilinx website, then extract the zip file contents into any write-accessible location on your hard drive or network location.
Recommended:
You will modify the tutorial design data while working through this tutorial. You should use a new copy of the directory extracted from ug1498-model-composer-sys-gen-tutorial.zip each time you start this tutorial.