You can use the write_project_tcl command to generate a tcl script that will re-create the current project. The script will keep the project settings and sources, but may not retain output products or design state.
As an alternative to creating a project in the Vivado IDE, you can create a project using a Tcl script. Most actions run in the Vivado IDE result in a Tcl command being executed. The Tcl commands appear in the Vivado IDE Tcl Console and are also captured in the vivado.jou and vivado.log files. The vivado.jou file contains just the commands, and the vivado.log file contains both commands and any returned messages. You can use these files to develop scripts for use with Project Mode. Refer to Output Files in Appendix A of the Vivado Design Suite User Guide: Using the Vivado IDE (UG893) for information on where the vivado.jou and log files are written.
For more information on Tcl commands, see the Vivado Design Suite Tcl Command Reference Guide (UG835).
Following is a sample script that creates a project, adds various sources, configures settings, launches synthesis and implementation runs, and creates a bitstream.
# Typical usage: vivado -mode tcl -source run_bft_project.tcl
# Create the project and directory structure
create_project -force project_bft_batch ./project_bft_batch -part xc7k70tfbg484-2
#
# Add various sources to the project
add_files {./Sources/hdl/FifoBuffer.v ./Sources/hdl/async_fifo.v \
./Sources/hdl/bft.vhdl}
add_files -fileset sim_1 ./Sources/hdl/bft_tb.v
add_files ./Sources/hdl/bftLib/
add_files -fileset constrs_1 ./Sources/bft_full.xdc
#
# Now import/copy the files into the project
import_files -force
#
# Set VHDL library property on some files
set_property library bftLib [get_files {*round_*.vhdl core_transform.vhdl \
bft_package.vhdl}]
#
# Update to set top and file compile order
update_compile_order -fileset sources_1
update_compile_order -fileset sim_1
#
# Launch Synthesis
launch_runs synth_1
wait_on_run synth_1
open_run synth_1 -name netlist_1
#
# Generate a timing and power reports and write to disk
# Can create custom reports as required
report_timing_summary -delay_type max -report_unconstrained -check_timing_verbose \
-max_paths 10 -input_pins -file syn_timing.rpt
report_power -file syn_power.rpt
#
# Launch Implementation
launch_runs impl_1 -to_step write_bitstream
wait_on_run impl_1
#
# Generate a timing and power reports and write to disk
# comment out the open_run for batch mode
open_run impl_1
report_timing_summary -delay_type min_max -report_unconstrained \
-check_timing_verbose -max_paths 10 -input_pins -file imp_timing.rpt
report_power -file imp_power.rpt
#
# Can open the graphical environment if visualization desired
# comment out the for batch mode
#start_gui