Using Global 3-State and Global Set and Reset Signals - 2021.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2021-06-16
Version
2021.1 English

The following figure shows how Global 3-State (GTS) and Global Set/Reset (GSR) signals are used in an FPGA.

Figure 1. Built-in FPGA Initialization Circuitry Diagram