To run implementation in steps:
- Right-click a run in the Design Runs window and select Launch Next Step: <Step> or Launch Step To from the popup menu shown in the
Valid <Step> values depend on which run steps have been enabled in the Run Settings. The steps that are available in an implementation run are:
- Opt Design
- Optimizes the logical design and fit sit onto the target Xilinx device.
- Power Opt Design
- Optimizes elements of the design to reduce power demands of the implemented device.
- Place Design
- Places the design onto the target Xilinx device.
- Post-Place Power Opt Design
- Additional optimization to reduce power after placement.
- Post-Place Phys Opt Design
- Performs timing-driven optimization on the negative-slack paths of a design.
- Route Design
- Routes the design onto the target Xilinx device.
- Post-Route Phys Opt Design
- Optimizes logic, placement, and routing, using actual routed delays.
- Write Bitstream (all devices except Versal devices)
- Generates a bitstream for Xilinx device configuration. Although not technically part of an implementation run, bitstream generation is available as an incremental step.
- Write Device Image (Versal devices)
- Generates a programmable device image for programming a Versal device.
- Repeat Launch Next Step: <Step> or Launch Step To as needed to move the design through implementation.
- To back up from a completed step, select Reset to Previous Step:
<Step> from the Design Runs window popup menu.
Select Reset to Previous Step to reset the selected run from its current state to the prior incremental step. This allows you to:
- Step backward through a run.
- Make any needed changes.
- Step forward again to incrementally complete the run.