Locking Cell Inputs and Adding DONT_TOUCH Constraint on LUT Loads - 2021.1 English

Vivado Design Suite User Guide: Implementation (UG904)

Document ID
UG904
Release Date
2021-08-30
Version
2021.1 English
You must ensure that the inputs of LUT loads to which you are routing are not being swapped with other inputs on those LUTs. To do so, lock the cell inputs of LUT loads as follows:
  1. Open Device window.
  2. Select the load LUT.
  3. Right-click and select Lock Cell Input Pins.

The equivalent Tcl command is:

set_property LOCK_PINS {NAME:BEL_PIN} <cell object>

To prevent pin swapping in Physical Synthesis in the Placer, a DONT_TOUCH constraint needs to be applied to the LUT cell. The Tcl command is:

set_property DONT_TOUCH TRUE <cell object>

For nets that have fixed routing and multiple LUT loads, the following Tcl script can be used to lock the cell inputs of all the LUT loads.

set fixed_nets [get_nets -hierarchical -filter IS_ROUTE_FIXED] foreach LUT_load_pin [get_pins -leaf -of [get_nets $fixed_nets] \
-filter DIRECTION==IN&&REF_NAME=~LUT*] {
set pin [get_property REF_PIN_NAME $LUT_load_pin]
set BEL_pin [file tail [get_bel_pins -of [get_pins $LUT_load_pin]]] set LUT_name [get_property PARENT_CELL $LUT_load_pin]
# need to handle condition when LOCK_pins property already exists on LUT set existing_LOCK_PIN [get_property LOCK_PINS [get_cells $LUT_name]]
if { $existing_LOCK_PIN ne "" } {
reset_property LOCK_PINS [get_cells $LUT_name]
}
set_property LOCK_PINS \
[lsort -unique [concat $existing_LOCK_PIN $pin:$BEL_pin]] [get_cells $LUT_name]
}