This example shows how to generate the .mcs files for a multiboot design with the "golden" bitstream loaded at address 0 and the multiboot bitstream loaded at address 0x0100_0000.
Devices: 2x 256 Mib Quad SPI Flash devices: 256 Mib = 32 MiB
Total storage size: 2 * 32 MiB = 64 MiB
Load addresses:
Golden: 0 * 2 = 0
Multiboot: 0x0100_0000 * 2 = 0x0200_0000
write_cfgmem -format mcs -interface spix8 -size 32 \
-loadbit "up 0 ./design1_spix8.bit up 0x02000000 ./design2_spix8.bit" \
-file design1_design2_spix8.mcs