Because each RM must be instantiated in the same black box in the static design, the different versions must have identical interfaces. The name of the block must be the same in each instance, and all the properties of the interfaces (names, widths, direction) must also be identical. Each configuration of the design is assembled like a flat design.
To synthesize a RM, turn off all buffer insertions. You can do so in Vivado Synthesis using the
synth_design command in conjunction with the
synth_design -mode out_of_context -flatten_hierarchy rebuilt -top <reconfig_module_name> -part <part>
||Prevents I/O insertion for synthesis and downstream tools. The
||There are several values allowed for
||This is the module/entity name of the module being synthesized.|
||This is the
part being targeted (for example,
synth_design command synthesizes the design and stores the results in memory. In order to write the results out to a file, use:
It is recommended to close the design in memory after synthesis, and run implementation separately from synthesis.