Reduce the Detour Due to Hold Violations - 2021.1 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2021-08-18
Version
2021.1 English

The router gives priority to fixing hold violations by detouring through longer paths. However, this adds more restrictions if the violations are inside the CONTAIN_ROUTING static Pblocks. There might not be enough solution space for detouring inside the static Pblock that includes a CONTAIN_ROUTING requirement. Therefore, Xilinx strongly recommends having a good post-place timing summary for such logic.