Running Design Rule Checks - 2021.1 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2021-06-16
Version
2021.1 English

IP integrator runs basic design rule checks in real time as the design is being assembled. However, there is a potential for something to go wrong during design creation. As an example, the frequency on a clock pin may not be set right. As shown in the following figure, you can run a comprehensive design check on the design by clicking the Validate Design button in the toolbar on the IP integrator canvas.

If the design is free of Warnings and/or Errors, a confirmation dialog box displays, as shown in the following figure.

Figure 1. Validation Successful Message