In this lab, you will learn about using the Power Optimization features in Vivado® for 7 series devices. The lab will take you through the steps for invoking Power Optimization after synthesizing the design. It will also guide you on how to use the power optimization report, make decisions and selectively turn off power optimization on signals, blocks, and hierarchies.
Tip: When you run Implementation on your design, the Vivado tools may perform block RAM power optimizations by default during opt_design. These optimizations will not affect performance, and will have little impact on area and run time. In the previous Lab, the default block RAM power optimization was disabled (Step 9 of Lab 1) by setting a NoBramPowerOpt directive to opt_design.