#Define Xil_L1DCacheFlush - 2021.2 English

Xilinx Standalone Library Documentation: OS and Libraries Document Collection

Document ID
UG643
Release Date
2021-10-27
Version
2021.2 English

Description

Flush the entire L1 data cache.

If any cacheline is dirty, the cacheline will be written to system memory. The entire data cache will be invalidated.