Debugging External Interfaces - 2021.2 English

H.264/H.265 Video Codec Unit v1.2 Solutions LogiCORE IP Product Guide (PG252)

Document ID
PG252
Release Date
2021-10-27
Version
2021.2 English

If you are using capture and display interfaces based on high-speed serial I/O (eg. HDMI, MIPI, SDI etc), ensure physical links are up before debugging the upper layers. Please follow these steps:

  1. Monitor for LEDs that indicate heart beat clocks that are derived based on reference clock input to transceiver. If the heart beat clocks are absent, check for GT PLL lock status.
  2. If PLL is not locked, check for Video PHY IP configuration and reference clock constraint. Most of the time, the reference clock is sourced from a programmable clock chip. Ensure the frequency is programmed properly in the device tree source file for the programmable clock chip and the frequency is not modified by other Linux devices (happens when the phandle of the clock source node is shared between multiple components).
  3. If the capture interface is compatible with the Video for Linux (v4l2) framework, use the media-ctl API to verify the link topology and link status.
    media-ctl –p –d /dev/mediaX

    The mediaX represents the pipeline device in the v4l2 pipeline. If you have multiple TPG/ HDMI pipelines, they appear as /dev/media0, /dev/media1, etc. The link status is indicated in the corresponding sub-device node. For example, a HDMI RXSS node indicates link status for the HDMI link in its sub-device properties while using the above command. If link up fails, a "no-link" message appears. Otherwise, valid resolution with proper color format is detected.

  4. If the display interface is compatible with DRM/KMS framework, please ensure DRM is linking up by running the one of following commands:
    • If the PL mixer block is used, use modetest –M xilinx_drm_mixer.
    • If the PL mixer block is not used, use modetest –M xilinx_drm.

    If you want to display a pattern to ensure the display path is working, use one of the following commands:

    • To display using the BG24 format, use modetest –M xilinx_drm_mixer –s <connector_id>@<crtc_id>:3840x2160-60@BG24.
    • To display using the NV12 format, use modetest –M xilinx_drm_mixer –P <crtc_id>:3840x2160-60@NV12.

    Run the modetest command multiple times to ensure a stable link at different resolution before proceeding with different VCU use-cases.

  5. If the capture pipeline (v4l2 based) or display pipeline (DRM/KMS based) are broken, then media-ctl or modetest applications show a broken pipeline and sub-devices are not being linked properly. If so, browse through the boot log to see if there is a probe failure for any of the v4l2 sub-device drivers. If the probe fails, check your dts file for any property name mismatch or missing/incorrect property.