In the low-power operation mode, a subset of the PS (shown as low-power domain in the figure above) is powered up that includes: the PMU, RPU, CSU, and the IOU.
In this mode, the ability to change system frequency allows power dissipation to be tuned. The CSU must be running continuously to monitor the system security against SEU and tampering. In this mode, the ability to change system frequency allows power dissipation to be tuned.
The low-power mode includes all lower-domain peripherals. Among the blocks within the low-power mode, PLLs, dual Cortex-R5F, USBs, and the TCM and OCM block RAMs offer power gating.
You can control power gating to different blocks through software by configuring the LPD_SLCR registers. See the SLCR_Registers link in the Zynq UltraScale+ Device Register Reference (UG1087) for more information on LPD_SLCR register.