The following table lists the tasks performed by the PMU in the pre-Boot sequence.
|0||Initialize MicroBlaze™ processor. Capture key states.|
|1||Scan, and clear LPD and FPD.|
|2||Initialize the System Monitor.|
|3||Initialize the PLL used for MBIST clocks.|
|4||Zero out the PMU RAM.|
|5||Validate the PLL. Configure the MBIST clock.|
|6||Validate the power supply.|
|7||Repair FPD memory (if required).|
|8||Zeroize the LPD and FPD and initialize memory self-test.|
|9||Power-down any disabled IPs.|
|10||Either release CSU or enter error state.|
|11||Enter service mode.|
As soon as the CSU reset is released, it executes the CSU bootROM and performs the following sequence:
- Initializes the OCM.
- Determines the boot mode by reading the boot mode register, which captures the boot-mode pin strapping at the POR.
- The CSU continues with the FSBL load and the optional PMU firmware load. PMU firmware is the software that can be executed by the PMU unit. The code executes from the RAM of the PMU. See Platform Management for more information.
The following figure shows the detailed boot flow diagram.
Figure 1. Detailed Boot Flow Example