System Reset - 2021.2 English

Zynq UltraScale+ MPSoC Software Developer Guide

Document ID
UG1137
Release Date
2021-10-27
Version
2021.2 English

In a system-reset, the entire hardware, both PS and PL are reset. After system reset is released, PS executes the standard boot process starting from the PMU ROM, followed by CSU ROM, then FSBL and so on. The following table shows the differences between system reset and POR:

Table 1. Differences between POR and System Reset
POR System Reset
Reset persistent registers Preserves persistent registers
Resamples boot mode pins Does not resample boot mode pins
Reset debug states Preserves debug states
Resample eFuse values Requires explicit software action to refresh
Security state determined Security state locked
Clear tamper response Preserves tamper response
Select security key source Security key source locked
Optional LBIST and/or SCAN/CLEAR Does not run LBIST or SCAN/CLEAR
Run MBIST Explicit software action needed to run MBIST

System reset can be initiated by Linux command or watchdog timeout or PMU error management block. If you are interested in only System reset without APU/RPU subsystem restart, subsystem/isolation configuration is not required.

Note: System reset is not supported in qspi24 mode on systems with a flash size that is greater than 16 MB.