In the final step of this flow, all the elements of the processing system from the preceding step are integrated and built on the custom platform, which was developed to deploy the application. This step is similar to the previous step but uses the custom platform instead of a Xilinx platform.
The goal of this step is to meet timing and performance closure on the actual target platform. By running through Vivado synthesis and place and route, you can address any differences in timing, utilization, and power that occur when you switch from the Xilinx standard platform to your custom platform.
This step also allows you to test and debug the custom platform as well as the application and processing system. Testing the processing system with external I/Os means you might encounter some differences between the previous step and this step in the hardware execution. However, if you designed your custom platform correctly, the standardized interfaces of the platform can insulate system testing from such differences.
For more information on how to assemble and verify the processing system on hardware, see the Implementation section and System Bring Up and Validation section of the Versal ACAP Design Process Documentation: System Integration and Validation.