Fanout/Site - 2021.2 English

Xilinx Power Estimator User Guide for Versal ACAP (UG1275)

Document ID
UG1275
Release Date
2021-11-09
Version
2021.2 English

The Fanout/Site is used to fine tune clock network power based on the number of clocked loads within a site, primarily the number of registers packed into a CLB. As total register usage rises, the packing factor increases regardless of the number of clocks in the design. This is the reason, Fanout/Site is calculated based on the total register usage for each clock in XPE and therefore different clocks with different fanouts can have same value of Fanout/Site.

You should modify the Fanout/Site value only when importing Vivado power analysis results where Fanout/Site is calculated from the actual clock load placement. For early estimation, it is recommended that you leave Fanout/Site at the default setting.

Note: The default value of Fanout/Site in XPE prior to 2021.2 is different and the results from the manual population may not be consistent with import from a previous XPE version.