Introduction - 2021.2 English

Xilinx Power Estimator User Guide for Versal ACAP (UG1275)

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2021.2 English

This document describes the Xilinx® Power Estimator (XPE) usage based on Versal® ACAP architecture descriptions. Accurate power estimation during the early design cycle is the key to the lowest possible power envelope for any design. Early estimation is crucial for choosing the right device, taking advantage of architectural benefits, changing the design topology, and using different IP blocks. Thus, making better trade-offs well ahead of the design phase allows you to meet specifications and get your product to market faster. Xilinx offers two types of power estimation tools – XPE which is typically used for estimation before design implementation and Vivado Report Power which is used during design implementation with better accuracy. Both of them have many features that help you create a low-power ACAP design. Xilinx recommends the following Power Methodology to overcome any power challenges throughout the design cycle.

Figure 1. Power Methodology

During the conceptualization and architectural exploration phases of a project, it is crucial to assess the power budget with limited availability of architectural details of the design. XPE addresses most of the early power estimation challenges. It is typically used in the pre-design and pre-implementation phases of a project and it assists with architecture evaluation, device selection, appropriate power supply components, and thermal management solutions specific to your application. XPE considers your design resource usage, toggle rates, I/O loading, and other factors. These factors, combined with the device models, help calculate the estimated power distribution. The device models are extracted from measurements, simulation, and extrapolation. XPE is built on Microsoft Excel running on an English Windows operating system, it has a rich set of power modeling features and algorithms to offer easy access and an easy to use model.

The accuracy of XPE is dependent on two primary sets of inputs. They are:

  • Device usage, thermal environment and solution, clock, enable, toggle rates, and other information you enter into the tool
  • Device data models integrated into XPE (Power Characterization accuracy)

For accurate power estimates of your application, enter information that is as complete as possible. Modeling a certain aspect of the design too conservatively or without sufficient knowledge of the design can result in unrealistic estimates. Some techniques to drive XPE to provide worst-case estimates or typical estimates are discussed in this document.

XPE is a pre-implementation tool for use in the early stages of a design cycle or when the Register Transfer Level (RTL) description is incomplete. During implementation, Report Power (in the Vivado® Design Suite) should be used for more accurate estimates and detailed power analysis. A common power modeling approach is adopted to ensure accurate and consistent estimation between XPE and Vivado Report Power.