Versal ACAP Power Domains - 2021.2 English

Xilinx Power Estimator User Guide for Versal ACAP (UG1275)

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2021.2 English

In Versal® ACAP architecture, different functional blocks are partitioned into power domains that are powered using dedicated supply rails. These supply rails can be connected to different power sources. The power consumed within a power domain can be controlled by manipulating the supply voltage to the power domain as a trade-off with its power rails as described in Table 1. The following figure shows how the circuitry on a Versal device die is partitioned into power domains, as it appears at the device level.

Note: Exact layout may vary based on the targeted Versal device and its size.
Figure 1. Device Level Power Domains
Table 1. Power Domain Descriptions
Power Domain Description
PMC Domain (VCC_PMC) This is an Always-On domain for the device and the only core domain that should be up for the device operation to start and stay maintained.
PS Low-Power Domain (VCC_PSLP) This domain needs to be up in addition to the PMC domain for the primary device configuration through USB to get started. This domain supplies power to RPUs (Realtime Processing Unit - Arm® Cortex-R5F core). Because this domain is associated with many of the low-power modes, it includes power islands to satisfy the power requirements of these modes.
PS Full-Power Domain (VCC_PSFP) This domain supplies power to APUs (Application Processing Unit - Arm® Cortex® -A72 core) within the PS that are not required during low-power modes.
NoC and DDRMC Domain (VCC_SOC) This power domain includes the NoC and Hardened Memory Controller. This domain should be up when the PL Domain is up.
Core and PL Domain (VCCINT) This domain includes the internal core logic of the PL, CCIX PCIe® Module (CPM), and AI Engine.
PL RAM Domain (VCC_RAM) This supply provides the power to the PL RAMs and the PL clocking network. This rail is expected to be up always while the VCCINT domain is up. If this supply is down, VCCINT domain incurs a power-on reset.
Battery-Powered Domain (VCC_BATT) This is the power domain for the RTC Core and the Battery-Backed RAM (BBRAM). This domain will be on the battery supply (VCC_BATT) if the device is off; otherwise, the PMC/PS Auxiliary supply (VCCAUX_PMC) provides the power to this domain.
Analog Domain This domain has three supplies namely GTY_AVCC, GTY_AVTT, and GTY_VCCAUX. GTY_AVCC is the analog supply for internal analog circuits of the transceivers. This includes analog circuits for the PLL, transmitters, and receivers. GTY_AVTT is the analog supply for transmitter and receiver termination circuits. GTY_VCCAUX is the auxiliary analog QPLL voltage supply for the transceivers.
Note: For GTP, the rails are GTP_AVCC, GTP_AVTT, and GTP_VCCAUX. For GTM, the rails are MGTM_AVCC, MGTM_AVTT, and MGTM_VCCAUX.
VCCO Domain This domain includes all the VCCO supplies. It powers all device I/Os.