Packaging RTL Kernels - 2021.2 English

Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2021-11-19
Version
2021.2 English

You can create Vitis PL kernels from RTL code or a Vivado IP block using the Vitis IP packager, as explained in RTL Kernel Development Flow in the Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393).