set_directive_stable - 2021.2 English

Vitis High-Level Synthesis User Guide (UG1399)

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2021.2 English


The STABLE pragma is applied to arguments of a DATAFLOW or PIPELINE region and is used to indicate that an input or output of this region can be ignored when generating the synchronizations at entry and exit of the DATAFLOW region. This means that the reading processes (resp. read accesses) of that argument do not need to be part of the “first stage” of the task-level (resp. fine-grain) pipeline for inputs, and the writing process (resp. write accesses) do not need to be part of the last stage of the task-level (resp. fine-grain) pipeline for outputs.

The pragma can be specified at any point in the hierarchy, on a scalar or an array, and automatically applies to all the DATAFLOW or PIPELINE regions below that point. The effect of STABLE for an input is that a DATAFLOW or PIPELINE region can start another iteration even though the value of the previous iteration has not been read yet. For an output, this implies that a write of the next iteration can occur although the previous iteration is not done.


set_directive_stable <location> <variable>
  • <location> is the function name or loop name where the directive is to be constrained.
  • <variable> is the name of the array to be constrained.


In the following example, without the STABLE directive, proc1 and proc2 would be synchronized to acknowledge the reading of their inputs (including A). With the directive, A is no longer considered as an input that needs synchronization.

void dataflow_region(int A[...], int B[…] ...
    proc2(A, ...);

The directives for this example would be scripted as:

set_directive_stable dataflow_region variable=A
set_directive_dataflow dataflow_region