This version of Xilinx® Runtime (XRT) includes the following new features.
- XRT API
Note: For detailed info about XRT API changes and experimental features, refer to the changelog.
- The XRT native API supports user managed kernel control
xclExecBufWithWaitList()API is deprecated and will be removed in a future release. See Versal ACAP AI Engine Kernel Coding User Guide (UG1079) for more details.
- The XRT native API supports user managed kernel control with
- AI Engine Support
- The XRT native API adds multiple process support for AI Engine.
- C++ support has been added for
- The AI Engine API in xrt_aie.h and xrt_graph.h is now stable. These files are moved from the include/experimental/ to the include/xrt/ directory.
- XRT Utilities
- A new utility,
xball, has been added to apply
xbmgmtcommands to all or a filtered part of the installed data center cards. Check
xball --helpfor details.
- The next generation
xbmgmttools are now default utilities and recommended to use. To use the legacy utilities, use
xbmgmt --legacywith legacy sub-commands, but be aware that the legacy version of the tool is likely to be obsoleted in future releases.
- A new command,
xbutil configure, has been added to allow you to enable, disable, or configure the PCIe Host Memory and PCIe Peer to Peer features. See the XRT documentation for more details.
- All XRT utilities now globally support the
--forceoption to skip user interactive confirmation.
- A new utility,
- A profile summary report is generated when any profiling option is enabled. All applicable summary tables and guidance are generated based on the profiling options enabled in the xrt.ini file.
- A new data transfer summary table provides aggregate information on a memory resource when monitors are added to memory resources in the design.
- New AI Engine profiling metric sets count different AI Engine events, including floating point exceptions in AI Engine, tile execution counts, and stream puts and gets.
zoclmemory manager improvements to support any
- Other Changes
- Register read and write in hardware emulation now use CU index ordering as the rest of XRT does.
- The following bugs relating to kernel address range
size have been fixed:
- Support custom address range size
- Tap error when writing outside the kernel address range