stop - 2021.2 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

Document ID
UG835
Release Date
2021-10-22
Version
2021.2 English

Use within a condition to tell simulation to stop when a condition is true

Syntax

stop [‑quiet] [‑verbose]

Returns

A "stop" in simulation is a pause and not a quit.

Usage

Name Description
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution

Categories

Description

The stop command pauses the current simulation. This command can be used within a condition, defined by add_condition, to pause the simulation when the condition is true.

Arguments

-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
Note: Any errors encountered on the command-line, while launching the command, will be returned. Only errors occurring inside the command will be trapped.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
Note: Message limits can be defined with the set_msg_config command.

Examples

The following example defines a condition named resetLow, that becomes true when the reset signal is low, and then puts a message to the standard output, and stops the current simulation:
add_condition -name resetLow {/testbench/reset == 0 } {
puts "Condition Reset was encountered at [current_time]. \
   Stopping simulation."
stop }