When working with Vivado Design Suite IP, you can disable the generation of an out-of-context (OOC) DCP and instead synthesize the IP RTL with the top-level design using the Global Synthesis option.
When you select the global synthesis flow, the Vivado tools synthesize the IP along with user HDL. Any changes made to user HDL result in the IP being re-synthesized as well.
During implementation, the Vivado tools apply any IP XDC output products that were generated for use during implementation along with any user constraints.
Always reference the IP using the XCI file. It is not recommended to read just the IP DCP file, either in a Project Mode or Non-Project Mode flow. While the DCP does contain constraints, it does not provide other output products that an IP could deliver and that could be needed, such as ELF or COE files, and Tcl scripts.