VHDL Array Types - 2021.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2021-10-22
Version
2021.2 English

A VHDL array is represented in C/C++ as an array of whatever C/C++ type represents the element type of the VHDL array. The following table shows the examples of VHDL arrays and their C/C++ equivalent types.

Table 1. VHDL Arrays and their C/C++ Equivalent Types
VHDL Array Type C/C++ Array Type
std_logic_vector (array of std_logic) char [ ]
bit_vector (array of bit) char [ ]
string (array of character) char [ ]
array of integer int [ ]
array of real double [ ]

VHDL arrays are organized in C/C++ with the left index of the VHDL array mapped to C/C++ array element 0 and the right index mapped to C/C++ element <array size> - 1.

Table 2. VHDL Array mapping to C/C++
C/C++ Array Index 0 1 2 <array size> - 1
VHDL array(left TO right) Index left left + 1 left + 2 right
VHDL array(left DOWNTO right) Index left left – 1 left – 2 right

Example code:

// For the following VHDL definitions
// signal slv : std_logic_vector(7 downto 0);
// signal bv : bit_vector(3 downto 0);
// signal s : string(1 to 11);
// type IntArray is array(natural range <>) of integer;
// signal iv : IntArray(0 to 3);
// do the following assignments
//
// slv <= "11001010";
// bv <= B"1000";
// s <= "Hello world";
// iv <= (33, 44, 55, 66); 
const unsigned char slvVal[] = {3, 3, 2, 2, 3, 2, 3, 2}; // 3 = '1', 2 = '0'
loader.put_value(slv, slvVal);
const unsigned char bvVal[] = {1, 0, 0, 0};
loader.put_value(bv, bvVal);
const char sVal[] = "Hello world"; // ends with extra '\0' that XSI ignores
loader.put_value(s, sVal);
const int ivVal[] = {33, 44, 55, 66};
loader.put_value(iv, ivVal);