VHDL bit Type - 2021.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
Release Date
2021.2 English

A single bit of VHDL bit type is represented in C/C++ as a single byte. The following table shows the values of bit and their C/C++ equivalents.

Table 1. Values of bit and their C/C++ equivalents
bit Value C/C++ Byte Value (Decimal)
'0‘ 0
‘1‘ 1

Example code:

// Put a '1' on signal "clk," where "clk" is defined as
// signal clk : bit;
const char one_val = 1; // C encoding for bit '1'...
int clk = loader.get_port_number("clk");
loader.put_value(clk, &one_val); // set clk to 1