Limitations - 2021.2 English

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2021-11-17
Version
2021.2 English
  • Auto-derived clocks can only be renamed at the pin where they originate, such as at the output of the Clock Modifying blocks (PLL, MMCM, . . .). For example, an auto-derived clock cannot be renamed at the output of a BUFG even though it propagates through it.
  • Primary clocks or user-defined generated clocks cannot be renamed. Only auto-derived clocks can be renamed with this mechanism.
  • The source_object must match the object where the auto-derived clock is created.

An error is returned if the tool cannot rename the generated clock. The master clock must also exist at the time the renaming is done. The auto-derived clocks can be renamed at any time inside the XDC, even after they have been referenced by some timing constraints.

For example, below is an abstract of report_clocks for the generated clock at the output pins of an MMCM:

====================================================
Generated Clocks
====================================================

Generated Clock	: clkfbout_clk_core
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKFBOUT}

Generated Clock	: clk_rx_clk_core
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT0}

Generated Clock	: clk_tx_clk_core
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Edges	: {1 2 3}
Edge Shifts	: {0.000 0.500 1.000}
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT1}

The three commands below illustrate the command line options that must be specified to rename the three auto-derived clocks at the output of the MMCM:


create_generated_clock -name clk_rx [get_pins clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT0] 
create_generated_clock -name clk_tx [get_pins clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT1] 
create_generated_clock -name clkfbout [get_pins clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKFBOUT]

After the renaming, below is the abstract from the report_clocks:

====================================================
Generated Clocks
====================================================
Generated Clock	: clkfbout
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKFBOUT}

Generated Clock	: clk_rx
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Multiply By	: 1
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT0}

Generated Clock	: clk_tx
Master Source	: clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKIN1 Master Clock	: clk_pin_p
Edges	: {1 2 3}
Edge Shifts	: {0.000 0.500 1.000}
Generated Sources : {clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst/CLKOUT1}