Timing Reports - 2021.2 English

Vivado Design Suite User Guide: Implementation (UG904)

Document ID
UG904
Release Date
2021-11-24
Version
2021.2 English

After completing an incremental place and route, you can analyze timing with details of cell and net reuse. Objects are tagged in timing reports to show the level of physical data reuse. This identifies whether or not your design updates are affecting critical paths.

The following references are used with their associated meaning:

  • (ROUTING): Both the cell placement and net routing are reused.
  • (PLACEMENT): The cell placement is reused but the routing to the pin is not reused.
  • (MOVED): Neither the cell placement nor the routing to the pin is reused.
  • (NEW): The pin, cell, or net is a new design object, not present in the reference design.

See the following example.

Routing SLICE_X65Y175 FDRE(Prop_EFF_SLICEL_C_Q)
0.114 -0.446 r	base_mb_i/microblaze_0/Q net (fo=637, routed) 0.752 0.306
base_mb_i/microblaze_0/reset_bool_for_rst
Routing SLICE_X73Y171 FDRE	r
base_mb_i/microblaze_0/command_reg_clear_reg/R

The above report, as it appears in the Vivado IDE, appears below.

Figure 1. Incremental Reuse Summary in Vivado

To remove the labels from the timing report, use the report_timing -no_reused_label option.