Analyzing Device Utilization Statistics - 2021.2 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2021-10-27
Version
2021.2 English

A common cause of implementation issues comes from not considering the explicit and implicit physical constraints. The pinout, for example, becomes an explicit physical constraint on logic placement. Slice logic is uniform in most devices. However, specialized resources such as the following, represent implicit physical constraints because they are only available in certain locations, and impact logic placement:

  • I/O
  • High Performance Banks
  • High Range Banks
  • MGT
  • DSP Slices
  • Block RAM
  • MMCM
  • BUFG
  • BUFR

Blocks that are large consumers of these specialized resource may have to spread around the device. Consider how this physically constrains the placement and routing when designing the interface with the rest of the design. Additionally, Pblocks are explicit physical constraints used to define allowable placement areas for specified logic. Use a combination of the following methods to analyze block resource usage on the device:

  • report_utilization
  • netlist properties
  • Pblock properties