Max/Min Delays for Groups - 2021.2 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

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2021.2 English

For Source Synchronous Output Interfaces, the output skew is desired with regard to the forwarded clock. A custom group report can be generated by specifying the reference port as the forwarded clock port. This table looks similar to "max/min delays for output buses" except the reference port is used as the reference bit for calculating source offset and bus skew.

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As an example, for a DDR output skew calculation, if multiple bits (for example, rldiii_a[0-19], rldiii_ba[0-3], rldiii_ref_n, rldiii_we_n) should be grouped together with regard to the forwarded clock port (rldiii_ck_n[0]), the following command can be used:

report_datasheet -group [get_ports {rldiii_ck_n[0] rldiii_a[*] rldiii_ba[*] 
rldiii_ref_n rldiii_we_n}] -name timing_1

The first port in the group list is considered the reference pin.

For all these sections, the worst case data is calculated from multi-corner analysis. If -show_all_corners is used, the worst case data is reported for each corner separately.

The following figure shows the report data sheet for this example.

Figure 1. Report Data Sheet Max/Min Delay Example