The Clock Utilization Report helps you analyze the utilization of clocking primitives and routing resources inside the device at the clock region level or at the clock net level. It can be useful for debugging clock placement issues and identify placement constraints to maximize the resource utilization. The Clock Utilization Report provides information on:
- The number of clocking primitives available and utilized, and their physical constraints
- The timing clock name and period associated with each clock net
- Each clock region clocking and fabric loads utilization
- Each clock net loads in each clock region
In addition, the Clock Utilization Report in the Vivado IDE supports netlist and device objects selection for highlighting placement information and creating schematics.