The Pulse Width Report (shown in the figure below) checks that the design meets min period, max period, high pulse time, and low pulse time requirements for each instance clock pin. It also checks that the maximum skew requirement is met between two clock pins of a same instance in the implemented design (for example, PCIe® clocks). The pulse width slack equations do not include jitter or clock uncertainty.
Equivalent Tcl command:
When run from the Tcl console, the pulse width report can be scoped to one or more hierarchical cells using the
-cells option. When the report is scoped, only pins included inside the cell(s) are reported. This option is not available from the Report Pulse Width GUI.