Opening the Hardware Manager - 2021.2 English

Vivado Design Suite User Guide: Getting Started

Document ID
UG910
Release Date
2021-10-27
Version
2021.2 English

You can open the Vivado Design Suite Hardware Manager to program your design into a device. The Vivado logic analyzer and Vivado serial I/O analyzer features of the tool enable you to debug your design. For example, you can add ILA, VIO, Memory IP, and JTAG-to-AXI cores to your design for debugging in the Vivado logic analyzer, or use the IBERT example design from the Xilinx IP catalog to test and configure the GTs in your design with the Vivado serial I/O analyzer.

For more information on these tools, see the Vivado Design Suite User Guide: Programming and Debugging (UG908).