breakpoints to debug the error with the low frequency signal output that you
previously observed. The erroneous
is driven from the
sineGen VHDL block. Start your debugging with
- Select the U_SINEGEN scope in the Scopes window to list the objects of that scope in the Objects window.
- In the Objects window, right-click sine[19:0] and use Go to Source
Code to open the sinegen.vhd source file in the Text Editor.Tip: If you do not see the
sine[19:0]signal in the Objects window, make sure that the filters at the top of the Objects window are set properly to include Output objects.
Looking through the HDL code, the
selinputs are correct as expected. Set your first breakpoint after the
resetasserts low at line 137.
- Scroll to line 137 in the file.
Add a breakpoint at line 137 in sinegen.vhd. Note that the breakpoint can be set only on the executable lines. The Vivado® simulator marks the executable lines with an empty red circle , on the left hand margin of the Text Editor, beside the line numbers.
Setting a breakpoint causes the simulator to stop at that point, every time the simulator processes that code, or every time the counter is incremented by one.
- Click the red circle in the left margin, to set a breakpoint, as
shown in the following figure.
Observe that the empty circle becomes a red dot to indicate that a breakpoint is set on this line. Clicking on the red dot removes the breakpoint and reverts it to the empty circle .
Note: To delete all breakpoints in the file, right-click on one of the breakpoints and select Delete All Breakpoints.
Debugging in the Vivado simulator, with breakpoints and line stepping, works best when you can view the Tcl Console, the Waveform window, and the HDL source file at the same time, as shown in the following figure.
- Resize the windows, and use the window Float command or the New Vertical Group command to arrange the various windows so that you can see them all.
- Click the Restart button to restart the simulation from time 0.
- Run the simulation by clicking the Run All button
The simulation runs to time 102.5 ns, or near the start of first counting, and stops at the breakpoint at line 137. The focus within the Vivado IDE changes to the Text Editor, where it shows the breakpoint indicator and highlights the line.
A message also displays in the Tcl console to indicate that the simulator has stopped at a specific time, displayed in picoseconds, indicating the line of source code last executed by the simulator.
Tip: When you have arranged windows to perform a specific task, such as simulation debug in this case, you can save the view layout to reuse it when needed. Use the Layout > Save Layout As command from the main menu to save view layouts. See the Vivado Design Suite User Guide: Using the Vivado IDE (UG893) for more information on arranging windows and using view layouts.
- Continue the simulation by clicking the Run All button .
The simulation stops again at the breakpoint. Take a moment to examine the values in the Waveform window. Notice that the
sine[19:0]signals in the Outputs group are uninitialized, as are the
sine_l[15:0]signals in the Internal signals group.
- In the Text Editor, add another breakpoint at line 144 of the
This line of code runs when the value of
selis 0. This code assigns, with bit extension, the low frequency signal,
sine_l, to the output, sine.
- In the Waveform window, select
sine_l[15:0]in the Internal Signals group, and holding Ctrl, select
sine[19:0]in the Outputs group.
These selected signals are highlighted in the Waveform window, making them easier for you to monitor.
- Run the simulation by clicking the Run All button .
Once again, the simulation stops at the breakpoint, this time at line 144.