- Read the following IP cores into the design:
- A legacy CORE Generator IP, with no output products or NGC.
- FIFO Generator
- 2020.2 version native IP with all output products, including a DCP.
- Clock Wizard
- 2020.2 version native IP with no output products.
- Block memory generator
- An outdated version of a native Vivado Design Suite IP with no output products generated.
All of these IP, with the exception of the Accumulator IP, are native Vivado cores. They have already been customized, and have Xilinx Core Instance (XCI) files. The Accumulator IP is a legacy CORE Generator log file (XCO).
The FIFO Generator IP already has all required output products available, and can be read and used directly from its current location. Whenever you create an IP customization, you should always generate all available output products.
- To read the FIFO Generator IP, including all the output products that are present, add the
following line to your
- Add the following to your Tcl script to create a local directory, with
sub-directories for the block memory, accumulator and the clock wizard
file mkdir IP/blk_mem file mkdir IP/clk_wiz file mkdir IP/accum
- Add the following to your Tcl script to copy the needed XCI files from the
current IP repository into the local
file copy -force ../Lab_3_4_sources/IP/blk_mem/blk_mem_gen_v7_3_0.xci ./IP/blk_mem file copy -force ../Lab_3_4_sources/IP/clk_wiz/clk_wiz_0.xci ./IP/clk_wiz file copy -force ../Lab_3_4_sources/IP/Accumulator/Accumulator.xco ./IP/accum
-forceoption causes the file to be overwritten if it already exists.Important: Without the
-forceoption, an error could be returned and the script will quit.
For the clocking wizard IP, you need to generate the output products before you can synthesize the design. In Non-Project Mode, the Vivado® Design Suite does not automatically generate output products, and errors will be encountered if you do not do this prior to launching synthesis.
Generating output products results in files and directories being written to the location the IP XCI files are read from. In a managed IP repository, these locations may be read-only or under revision control. In this case, you would copy the needed XCI files to a local directory before reading them into the in-memory design.Important: Have each XCI file stored in its own directory. When output products are generated, they are written to the same directory as the XCI file. If IP files are written to the same directory, it is possible that output products from different IPs could overwrite each other.
- Add these lines to your Tcl script to read in the needed XCI
read_ip ./IP/blk_mem/blk_mem_gen_v7_3_0.xci read_ip ./IP/clk_wiz/clk_wiz_0.xci read_ip ./IP/accum/Accumulator.xco
The specified XCI files are read into the in-memory design.
Unlike in Lab 3, the warnings related to locked IP do not display when the IP are processed into the design using the
read_ipcommand. In Project Mode, the Vivado Design Suite performs checks as an IP is added to a project, resulting in the warning messages seen in Lab 3, Step 4: Add Existing IP. In Non-Project Mode, the checks are only performed when the IP are processed during synthesis.