Adding Min and Max Delay Constraints - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

The min and max delay exceptions are used to override the default path requirement respectively for hold/removal and setup/recovery checks by replacing the launch and capture edge times with the delay value from the constraint.