Avoid Multiple RPs Driving Same Static Leaf Cell - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

Ensure that a static boundary leaf cell is connected to only one reconfigurable partition (RP). PPLOC reduction is triggered for a reconfigurable module (RM) pin only if the static boundary leaf cell is placed in the expanded routing footprint of the RP. A leaf cell with individual leaf pins connected to multiple RPs can be placed in the expanded routing footprint of only one RP. Therefore, PPLOC reduction cannot occur on two RPs at the same time.

In the following example, two RPs are connected to the same static boundary leaf cell. This approach is not recommended, because it negatively impacts routability.

Figure 1. Two RPs Driving the Same Static Boundary Leaf Cell

In the following example, two RPs each drive different static boundary leaf cells. LUT1 is inserted to separate the static boundary leaf cells. This approach is recommended for improved routability.

Figure 2. Two RPs Driving Unique Static Boundary Leaf Cells