Avoiding Path Segmentation - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

Path segmentation is introduced when specifying invalid startpoint or endpoint for the -from or -to options of the set_max_delay and set_min_delay commands only. When a set_max_delay introduces path segmentation on a path, the default hold analysis no longer takes place. You must constrain the same path with set_min_delay if you desire to constrain the hold analysis as well. The same rule applies with the set_min_delay command relative to the setup analysis.

Path segmentation must only be used by experts as it alters the fundamentals of timing analysis:

  • Path segmentation breaks clock skew computation on the segmented path.
  • Path segmentation can break more paths than the one constrained by the segmenting set_max_delay or set_min_delay command.