Complex Design - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

For a complex design with IP cores or several designer teams:

  • 1 file for top-level timing + 1 file for top-level physical + 1 file per IP/major block