Design Constraints - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

Design constraints define the requirements that must be met by the compilation flow for the design to be functional in hardware. For complex designs, constraints also define guidance for the tools to help with convergence and closure. Not all constraints are used by all steps in the compilation flow. For example, physical constraints are used only during the implementation steps: optimization, placement, and routing.

Because synthesis and implementation algorithms are timing-driven, creating proper timing constraints is essential. Over-constraining or under-constraining your design makes timing closure difficult. You must use reasonable constraints that correspond to your application requirements. For more information on constraints, see the following resources:

  • Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
  • Applying Design Constraints video tutorials available from the Vivado Design Suite Video Tutorials page on the Xilinx® website
Note: Traditional and platform-based design flows use design constraints in a similar manner. However, platform-based designs require extra attention for signals crossing the boundary from the static region of the design to the dynamic region of the design. Constraining these signals properly ensures flexibility of the platform and minimizes platform revisions.